LCD-ESP32-Driver 1.0
Project includes component for controlling LCD displays. Currently supports only one LCD controller - SSD1283A but it may change in the future.
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lcd_ssd1283a_registers.h
Go to the documentation of this file.
1/*
2 * MIT License
3 *
4 * Copyright (c) 2022 Damian Úlusarczyk
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
7 * and associated documentation files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in all copies or substantial
13 * portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
16 * TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
18 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 */
28#ifndef LCD_SSD1283A_REGISTERS_H
29#define LCD_SSD1283A_REGISTERS_H
30
31#define SSD1283A_OSCILLATION 0x00
32#define SSD1283A_DRIVER_OUTPUT_CTRL 0x01
33#define SSD1283A_DRIVER_AC_CTRL 0x02
34#define SSD1283A_ENTRY_MODE 0x03
35#define SSD1283A_CMP_REG_1 0x04
36#define SSD1283A_CMP_REG_2 0x05
37#define SSD1283A_DISPLAY_CTRL 0x07
38#define SSD1283A_FRAME_CYCLE_CTRL 0x0B
39#define SSD1283A_POWER_CTRL_1 0x10
40#define SSD1283A_POWER_CTRL_2 0x11
41#define SSD1283A_POWER_CTRL_3 0x12
42#define SSD1283A_POWER_CTRL_4 0x13
43#define SSD1283A_HORIZONTAL_PORCH 0x16
44#define SSD1283A_VERTICAL_PORCH 0x17
45#define SSD1283A_POWER_CTRL_5 0x1E
46#define SSD1283A_POWER_CTRL_6 0x1F
47#define SSD1283A_RAM_SET 0x21
48#define SSD1283A_RAM_WRITE 0x22
49#define SSD1283A_RAM_READ 0x22
50#define SSD1283A_RAM_WRITE_MASK_1 0x23
51#define SSD1283A_RAM_WRITE_MASK_2 0x24
52#define SSD1283A_VCOM_OTP_1 0x28
53#define SSD1283A_VCOM_OTP_2 0x29
54#define SSD1283A_GAMMA_CTRL_01 0x30
55#define SSD1283A_GAMMA_CTRL_02 0x31
56#define SSD1283A_GAMMA_CTRL_03 0x32
57#define SSD1283A_GAMMA_CTRL_04 0x33
58#define SSD1283A_GAMMA_CTRL_05 0x34
59#define SSD1283A_GAMMA_CTRL_06 0x35
60#define SSD1283A_GAMMA_CTRL_07 0x36
61#define SSD1283A_GAMMA_CTRL_08 0x37
62#define SSD1283A_GAMMA_CTRL_09 0x38
63#define SSD1283A_GAMMA_CTRL_10 0x39
64#define SSD1283A_GATE_SCAN 0x40
65#define SSD1283A_VERTICAL_SCROLL_CTRL 0x41
66#define SSD1283A_1ST_DISPLAY 0x42
67#define SSD1283A_2ND_DISPLAY 0x43
68#define SSD1283A_HORIZONTAL_RAM_SET 0x44
69#define SSD1283A_VERTICAL_RAM_SET 0x45
72#define SSD1283A_DISPLAY_CTRL_DISPLAYON1_MSB 0x00
74#define SSD1283A_DISPLAY_CTRL_DISPLAYON1_LSB 0x21
75
77#define SSD1283A_OSCILLATION_DISPLAYON_MSB 0x00
79#define SSD1283A_OSCILLATION_DISPLAYON_LSB 0x01
80
82#define SSD1283A_DISPLAY_CTRL_DISPLAYON2_MSB 0x00
84#define SSD1283A_DISPLAY_CTRL_DISPLAYON2_LSB 0x23
85
87#define SSD1283A_POWER_CTRL_1_DISPLAYON_MSB 0x2F
89#define SSD1283A_POWER_CTRL_1_DISPLAYON_LSB 0xC4
90
92#define SSD1283A_DISPLAY_CTRL_DISPLAYON3_MSB 0x00
94#define SSD1283A_DISPLAY_CTRL_DISPLAYON3_LSB 0x33
95
97#define SSD1283A_DRIVER_OUTPUT_CTRL_INIT_MSB 0x23
99#define SSD1283A_DRIVER_OUTPUT_CTRL_INIT_LSB 0x83
100
102#define SSD1283A_ENTRY_MODE_INIT_MSB 0x68
104#define SSD1283A_ENTRY_MODE_INIT_LSB 0x20
105
107#define SSD1283A_DRIVER_AC_CTRL_INIT_MSB 0x00
109#define SSD1283A_DRIVER_AC_CTRL_INIT_LSB 0x00
110
112#define SSD1283A_DISPLAY_CTRL_DISPLAYOFF_MSB 0x00
114#define SSD1283A_DISPLAY_CTRL_DISPLAYOFF_LSB 0x00
115
117#define SSD1283A_OSCILLATION_DISPLAYOFF_MSB 0x00
119#define SSD1283A_OSCILLATION_DISPLAYOFF_LSB 0x00
120
122#define SSD1283A_POWER_CTRL_1_DISPLAYOFF_MSB 0x00
124#define SSD1283A_POWER_CTRL_1_DISPLAYOFF_LSB 0x01
125
126#endif /* LCD_SSD1283A_REGISTERS_H */